An interleaved rational/radix arithmetic system for high-precision computations

Abstract

A new interleaved rational/radix number system is proposed for upgrading the precision of normalized Floating-Point (FLP) arithmetic operations without increasing the basic word length. A complete set of rational rounding and arithmetic algorithms are developed. The Average Relative Representation Error (ARRE) of the proposed flexible FLP system is computed through a series of simulation studies on CDC 6500. Our results show a 10% improvement of representation accuracy when compared with the ARRE of conventional FLP system. The architecture of a rational FLP arithmetic processor is also presented. Tradeoffs between operating speed and computing accuracy are discussed.