Performance assessment of different control strategies for five level DCMLIs supplying static loads and dynamic loads

Abstract

Performance evaluation of two different topologies of five level diode clamped multilevel inverter (DCMLI), supplying static loads and dynamic loads is presented in this paper. For the classical DCMLI the control strategies implemented are Phase disposition (PD), Phase opposition disposition (POD), Alternate phase opposition disposition (APOD) and unsymmetrical sine pulse width modulation. Another five level topology, which is free from the problem of voltage collapse, is compared with the classical topology. All the control methods have been simulated in MATLAB. A variation in Total Harmonic Distortion (THD) in output voltage and output current is analyzed for each control strategy. These values are compared to the THD values obtained from another five level topology. Comparison is done for both topologies once by keeping inverter input voltage constant and thereafter by keeping inverter output voltage constant. Both static loads and dynamic loads have been used. The effect of changing load on the THD values of voltage and current has also been tabulated.