A BiCMOS technology with 660 MHz vertical PNP transistors for analog/digital ASICs

Abstract

A BiCMOS technology with a triple-diffused vertical p-n-p transistor has been developed to meet wide-bandwidth requirements for mixed analog/digital application-specific integrated circuits (ASICs). An fT of 660 MHz and BVceo of over 15 V were obtained for the p-n-p transistor, by adding only one extra mask to a conventional 2.0-μm BiCMOS process (a total of 20 masks for double-layer metallization). A unity-gain frequency of 52 MHz and DC gain of over 85 dB were obtained for a single-supply operational amplifier with p-n-p first stage. A propagation delay time of 1.27 ns for a CMOS 2 NAND gate has been obtained under a 3 F/O and 3-mm-length wiring load condition