Hardware-software covalidation: fault models and test generation

Abstract

The increasing use of hardware-software systems in cost-critical and life-critical applications has led to heightened significance of design correctness of these systems. This paper presents a summary of research in hardware-software covalidation winch involves the verification of design correctness using simulation-based techniques. This paper focuses on the test generation process for hardware-software systems as well as the fault models and fault coverage analysis techniques which support test generation.