Fault tolerant VLSI design with functional block redundancy

Abstract

Functional block redundancy is a dynamic redundancy technique for fault tolerance of VLSI circuits with nonregular logic structure, such as gate array designs. It exploits functional similarity of subcircuits, such as repeatedly used counter and shift register functions, to reduce the overhead of standby modules. The example of a manually optimized industrial gate array shows an extremely low overhead factor of 1.8 for complete single fault tolerance, which previously could not be reached for this type of circuit.<>