Impact of memory cell array bridges on the faulty behavior in embedded DRAMs

Abstract

Establishing functional faults, based on defect injection and circuit simulation, has become an important method in understanding faulty memory behavior and in improving memory tests. In this paper this approach is used to study the effects of bridges on the faulty behavior of embedded DRAM (eDRAM) devices. The paper applies the new approach of fault primitives to perform this analysis. The analysis shows the existence of previously defined memory fault models, and (re)establishes new ones. The paper also investigates the concept of dynamic faulty behavior and establishes its importance for memory devices.