Toward fast low power adaptive spike sorting VLSI chip design for wireless BCI implants

Abstract

Recently, controlling the surrounding world by just the power of our thoughts has become a reality using Brain Computer/Machine Interface (BCI/BMI). Enabling handicap people to control artificial limbs is one of the most important goals of BCI. There are challenges in providing the usability of BCI implants because most of the BCI sensors are non-practical or increases the infection hazard to the patients. Some research proposed wireless implants that do not require chronic wound in the skull. However, in such cases, the communications consume much power via a slow and complex arithmetic unit, high power and bandwidth that exceeds the allowed limits [1]. This study proposes and implements a neural based real-time spike sorting technique for wireless BCI that is faster and simpler than the existing designs, which was achieved by simplifying the computational units, restricting fixed point architecture and involving an adaptive immune system structure based behavior; which makes the design also power and area efficient. The system was implemented, and simulated using Modalism and Cadence.