A Low-Power Wide Supply Range Delay-Line Based IC for Amperometric Measurement

A. Nag, R. Dahiya, S. Mitra
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引用次数: 1

Abstract

A novel Delay Line based bidirectional readout IC is proposed for Potentiostatic measurement which allows time-domain analysis of sensor current and offers highly linear (R2=0.9998), low noise and low power implementation. The architecture is implemented in 0.18μm process and can operate for two distinct input range (IR) ±10nA/±10μA, while the Delay Line consumes 3.6μW/150.7μW power, respectively. Due to its digital intensive nature, the architecture supports a wide variation in supply voltage 0.6V-1.8V, while ensuring little deviation of sensitivity.
基于低功耗宽供电范围延迟线的安培测量集成电路
提出了一种新的基于延迟线的双向读出集成电路,用于恒电位测量,允许传感器电流的时域分析,并提供高线性(R2=0.9998),低噪声和低功耗实现。该架构采用0.18μm工艺,可在±10nA/±10μA两个不同的输入范围(IR)下工作,延迟线功耗分别为3.6μW/150.7μW。由于其数字密集型特性,该架构支持0.6V-1.8V的宽电压变化,同时保证灵敏度的小偏差。
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