A simulation study of SOI RESURF junctions for HV LDMOS (>600V)

Abstract

HV LDMOS on SOI has found wide applications such as lighting electronics and motor control due to its advantages over conventional LDMOS on bulk silicon. However, the design of optimized junctions with high breakdown voltages is commonly recognized to be difficult. This is partly because of the lack of analytical knowledge for the junctions design. In this study, various junctions were simulated by TCAD and analyzed from semiconductor physics point of view. It includes not only the junctions showing high breakdown voltages (>600V) but also the junctions showing relatively low breakdown voltages. The electrical field distribution, electrostatic potential distribution, depletion region and mobile carriers etc. were compared and analyzed to explain the reasons why a high breakdown voltage can be achieved for some junctions. Additionally, the breakdown voltage dependence on drift region doping profile was also studied.