Wire Bond Integrity Test Chip

R. Blish, L. Parobek
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引用次数: 20

Abstract

A special test chip and bonding diagram has been designed to nondestructively evaluate wire bond integrity of plastic encapsulated IC packages. Differential Kelvin resistance measurements as a function of bake time provide a quantitative measure of bond degradation. It was found that a 20 m¿ resistance increase corresponds to unacceptable performance in bond pull and ball shear. A hypothesis is advanced to explain the development of bimodal distributions of bond resistance change and bond pull strengths, which develop after long bake periods. This method was used for optimization of gold wire bonding to pure aluminum and silicon-doped aluminum, and for encapsulant selection.
线键完整性测试芯片
设计了一种特殊的测试芯片和键合图,用于无损评估塑料封装IC封装的线键合完整性。微分开尔文电阻测量作为烘烤时间的函数提供了粘结降解的定量测量。发现20 m的阻力增加对应于不可接受的性能粘结拉和球剪切。提出了一种假设来解释长时间烘烤后形成的键阻力变化和键拉强度双峰分布的发展。利用该方法优化了金线与纯铝和掺硅铝的粘结性能,并对封装剂进行了选择。
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