A family of adders

S. Knowles
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引用次数: 311

Abstract

Binary carry-propagating addition can be efficiently expressed as a prefix computation. Several examples of adders based on such a formulation have been published, and efficient implementations are numerous. Chief among the known constructions are those of Kogge and Stone and Ladner and Fischer. In this work we show that these are end cases of a large family of addition structures, all of which share the attractive property of minimum logical depth. The intermediate structures allow trade-offs between the amount of internal wiring and the fanout of intermediate nodes, and can thus usually achieve a more attractive combination of speed and area/power cost than either of the known end-cases. Rules for the construction of such adders are given, as are examples of realistic 32b designs implemented in an industrial Ou25 CMOS process.
加法器家族
二进制进位传播加法可以有效地表示为前缀计算。已经发表了几个基于这种公式的加法器示例,并且有许多有效的实现。在已知的建筑中,最主要的是科格、斯通、拉德纳和费舍尔的建筑。在这项工作中,我们证明了这些是一大类加法结构的最终情况,它们都具有最小逻辑深度的吸引性质。中间结构允许在内部布线数量和中间节点的扇出之间进行权衡,因此通常可以实现比任何已知的最终案例更有吸引力的速度和面积/功率成本组合。本文给出了这些加法器的构造规则,以及在工业Ou25 CMOS工艺中实现的实际32b设计的示例。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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