A Designer's Rationale for Nanoelectronic Hardware Security Primitives

G. Rose, Mesbah Uddin, M. Majumder
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引用次数: 7

Abstract

A variety of hardware security primitives have been developed in recent years, aimed at mitigating issues such as integrated circuit (IC) piracy, counterfeiting, and side-channel analysis. For example, a popular security primitive for mitigating such hardware security vulnerabilities is the physical unclonable function (PUF) which provides hardware specific unique identification based on intrinsic process variations in individual integrated circuit implementations. At the same time, as technology scaling progresses further into the nanometer region, emerging nanoelectronic technologies are becoming viable options for many next-generation computing technologies. At the intersection between nanoelectronics and security, several examples of nano-enabled security primitives have been proposed in the last few years. In this paper, we consider a few examples of nanoelectronic security in the context of how such nanoscale technologies impact power, area and delay as compared to conventional CMOS-based approaches. Our analyses show that leveraging novel nanoelectronic technologies not only provide area benefits but also energy-efficient solutions that enable security with a small footprint.
纳米电子硬件安全原语的设计原理
近年来已经开发了各种硬件安全原语,旨在减轻诸如集成电路(IC)盗版、假冒和侧信道分析等问题。例如,减轻此类硬件安全漏洞的流行安全原语是物理不可克隆功能(PUF),它基于单个集成电路实现中的内在进程变化提供特定于硬件的唯一标识。与此同时,随着技术规模进一步发展到纳米领域,新兴的纳米电子技术正在成为许多下一代计算技术的可行选择。在纳米电子学和安全性之间的交叉点,在过去几年中已经提出了几个支持纳米安全性原语的示例。在本文中,我们考虑了纳米电子安全的几个例子,与传统的基于cmos的方法相比,这些纳米级技术如何影响功率,面积和延迟。我们的分析表明,利用新颖的纳米电子技术不仅提供了面积效益,而且还提供了节能解决方案,使安全与小足迹。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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