Computing the error escape probability in count-based compaction schemes

Abstract

A unified probabilistic model of count-based compaction is presented that relates the probability of occurrence of the 'counted' events to a circuit's fault detection probabilities. This model enables an identical treatment to be made of all the different count-based techniques proposed to date, e.g., ones, transitions, edges, and spectral coefficients. Based on this model, the authors propose a computation technique for determining the error escape associated with these specific, as well as more general, count-based compaction techniques, under various error models.<>