A low power DRAM refresh control scheme for 3D memory cube

Ying Wang, Yinhe Han, Huawei Li
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引用次数: 2

Abstract

We propose a low power refresh control scheme for 3D stacked DRAM memory, which leverages the data-pattern dependence characteristics of the cells' Retention-Time to squeeze the margin of refresh interval. It is a systematic approach that uses our proposed Retention-Time (RT) detection mechanism to capture the bottleneck that contributes to over-frequent refresh operations: “weak” cells with relatively shorter Retention-Time than others. With the help of memory scrubbers and Error Correction Pointer (ECP) table integrated on logic base of 3D memory cube, we can avoid the worst-case operation by locating the true “weak” cells sensitized by application and adapting the refresh rate to the data layout under our loop-based control algorithm. As shown in experiments, the method dramatically saves memory energy and bandwidth consumption.
一种用于三维存储立方体的低功耗DRAM刷新控制方案
我们提出了一种低功耗的3D堆叠DRAM内存刷新控制方案,该方案利用单元保留时间的数据模式依赖特性来压缩刷新间隔的裕度。这是一种系统的方法,它使用我们提出的保留时间(RT)检测机制来捕获导致过度频繁刷新操作的瓶颈:保留时间相对较短的“弱”单元。在基于循环的控制算法中,利用集成在三维存储立方体逻辑基础上的记忆洗涤器和纠错指针(ECP)表,定位被应用敏感化的真正“弱”单元,并根据数据布局调整刷新率,从而避免了最坏情况的发生。实验结果表明,该方法极大地节省了内存能量和带宽消耗。
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