Jagar Singh, C. Jerome, A. Wei, R. Miller, B. Arnaud, Cheng Lili, H. Zang, Punchihewa Kasun, Prabhu Manjunatha, Senapati Biswanath, Anil Kumar, S. Pandey, N. M. Iyer, Anurag Mittal, R. Carter, Lun Zhao, E. Manfred, S. Samavedam
{"title":"Analog, RF, and ESD device challenges and solutions for 14nm FinFET technology and beyond","authors":"Jagar Singh, C. Jerome, A. Wei, R. Miller, B. Arnaud, Cheng Lili, H. Zang, Punchihewa Kasun, Prabhu Manjunatha, Senapati Biswanath, Anil Kumar, S. Pandey, N. M. Iyer, Anurag Mittal, R. Carter, Lun Zhao, E. Manfred, S. Samavedam","doi":"10.1109/VLSIT.2014.6894378","DOIUrl":null,"url":null,"abstract":"Fin-based analog, passive, RF and ESD devices have serious performance challenges, such as poor ideality, higher leakage, low breakdown voltage (BV) of diodes, BJTs with poor ideality, mismatch, weak re-surf action and low drain current(Id/μm) of Laterally diffused MOS (LDMOS), degraded RF and 1/f noise of analog CMOS, etc. Innovative solutions which maintain process simplicity and low cost are described in this paper. These new device designs demonstrate excellent performance, such as near perfect-ideality(η)≈1.01 diodes, low leakage, high BV, and BJTs with excellent analog behavior. Fin-based LDMOS and ESD devices outperform conventional planar devices in terms of Id/μm and ESD human body model (HBM) performance, respectively.","PeriodicalId":105807,"journal":{"name":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","volume":"100 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2014.6894378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
Fin-based analog, passive, RF and ESD devices have serious performance challenges, such as poor ideality, higher leakage, low breakdown voltage (BV) of diodes, BJTs with poor ideality, mismatch, weak re-surf action and low drain current(Id/μm) of Laterally diffused MOS (LDMOS), degraded RF and 1/f noise of analog CMOS, etc. Innovative solutions which maintain process simplicity and low cost are described in this paper. These new device designs demonstrate excellent performance, such as near perfect-ideality(η)≈1.01 diodes, low leakage, high BV, and BJTs with excellent analog behavior. Fin-based LDMOS and ESD devices outperform conventional planar devices in terms of Id/μm and ESD human body model (HBM) performance, respectively.