{"title":"Fast and power efficient level shifter using FD SOI MOSFETS and widlar current mirror configuration","authors":"M. Johri, V. Mishra, R. Chauhan","doi":"10.1109/ICETEESES.2016.7581403","DOIUrl":null,"url":null,"abstract":"In this paper, two low voltage level shifters are designed which are fast and power efficient. The level shifters shift the level from subthreshold to above threshold voltage. The level shifters are designed at 65nm process technology. The first level shifter is designed by replacing the bulk MOSFET with the FD SOI MOSFET using HSPICE simulator. The other level shifter is designed by using SOI MOSFET instead of bulk MOSFET and a widlar current mirror. SOI MOSFET is used in order to reduce leakage currents that are induced due to scaling (reduction in leakage current also reduces the power dissipation in the level shifter). Here, the effects of using widlar current mirror over Wilson current mirror has been studied.","PeriodicalId":322442,"journal":{"name":"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Emerging Trends in Electrical Electronics & Sustainable Energy Systems (ICETEESES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICETEESES.2016.7581403","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
In this paper, two low voltage level shifters are designed which are fast and power efficient. The level shifters shift the level from subthreshold to above threshold voltage. The level shifters are designed at 65nm process technology. The first level shifter is designed by replacing the bulk MOSFET with the FD SOI MOSFET using HSPICE simulator. The other level shifter is designed by using SOI MOSFET instead of bulk MOSFET and a widlar current mirror. SOI MOSFET is used in order to reduce leakage currents that are induced due to scaling (reduction in leakage current also reduces the power dissipation in the level shifter). Here, the effects of using widlar current mirror over Wilson current mirror has been studied.
本文设计了两种快速、节能的低压电平移位器。电平移位器将电平从亚阈值电压移至高于阈值电压。电平移位器采用65nm工艺技术设计。利用HSPICE模拟器,用FD SOI MOSFET取代体MOSFET,设计了第一电平移位器。另一种移电平器是用SOI MOSFET代替大块MOSFET和宽电流反射镜设计的。使用SOI MOSFET是为了减少由于缩放引起的泄漏电流(泄漏电流的减少也降低了电平移相器的功耗)。本文研究了采用宽电流反射镜对威尔逊电流反射镜的影响。