A Type-3 PLL for Single-Phase Applications

Abdullahi Bamigbade, V. Khadkikar, M. A. Hosani
{"title":"A Type-3 PLL for Single-Phase Applications","authors":"Abdullahi Bamigbade, V. Khadkikar, M. A. Hosani","doi":"10.1109/IAS.2019.8911942","DOIUrl":null,"url":null,"abstract":"Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.","PeriodicalId":376719,"journal":{"name":"2019 IEEE Industry Applications Society Annual Meeting","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE Industry Applications Society Annual Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IAS.2019.8911942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 17

Abstract

Different structures of single-phase PLL have been widely developed for the synchronization of single-phase grid-connected power electronic-based equipments. These PLLs mostly employ proportional-integral (PI) controller as loop filter, thereby resulting in a type-2 control system. Hence, they are able to achieve zero steady-state phase error following step changes in frequency and phase of a single-phase input signal. However, when the input signal varies continuously over time in a linear manner, these PLLs exhibit a finite steady-state phase error. Thus, they may not be suitable for applications that require accurate estimation of phase angle when a ramp change in frequency occurs. To overcome this problem without compromising the benefits of type-2 PLLs, a type-3 PLL for single-phase applications is developed in this paper. Through experimental validation and comparison with an advanced single-phase type-2 PLL, the effectiveness of developed type-3 PLL is demonstrated.
用于单相应用的3型锁相环
为了实现单相并网电力电子设备的同步,不同结构的单相锁相环得到了广泛的发展。这些锁相环大多采用比例积分(PI)控制器作为环路滤波器,从而形成2型控制系统。因此,它们能够在单相输入信号的频率和相位阶跃变化后实现零稳态相位误差。然而,当输入信号以线性方式随时间连续变化时,这些锁相环表现出有限的稳态相位误差。因此,当频率发生斜坡变化时,它们可能不适合需要精确估计相位角的应用。为了在不影响2型锁相环优点的情况下克服这一问题,本文开发了一种用于单相应用的3型锁相环。通过实验验证和与先进的单相2型锁相环的比较,验证了所开发的3型锁相环的有效性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信