A multiprocessor DSP system using PADDI-2

R. A. Sutton, V. P. Srini, J. Rabaey
{"title":"A multiprocessor DSP system using PADDI-2","authors":"R. A. Sutton, V. P. Srini, J. Rabaey","doi":"10.1145/277044.277056","DOIUrl":null,"url":null,"abstract":"We have integrated an image processing system built around PADDI-2, a custom 48 node MIMD parallel DSP. The system includes image processing algorithms, a graphical SFG tool, a simulator, routing tools, compilers, hardware configuration and debugging tools, application development libraries, and software implementations for hardware verification. The system board, connected to a SPARCstation via a custom Sbus controller, contains 384 processors in 8 VLSI chips. The software environment supports a multiprocessor system under development (VGI-1). The software tools and libraries are modular, with implementation dependencies isolated in layered encapsulations.","PeriodicalId":221221,"journal":{"name":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","volume":"229 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/277044.277056","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15

Abstract

We have integrated an image processing system built around PADDI-2, a custom 48 node MIMD parallel DSP. The system includes image processing algorithms, a graphical SFG tool, a simulator, routing tools, compilers, hardware configuration and debugging tools, application development libraries, and software implementations for hardware verification. The system board, connected to a SPARCstation via a custom Sbus controller, contains 384 processors in 8 VLSI chips. The software environment supports a multiprocessor system under development (VGI-1). The software tools and libraries are modular, with implementation dependencies isolated in layered encapsulations.
基于padi -2的多处理器DSP系统
我们集成了一个围绕padi -2构建的图像处理系统,padi -2是一个定制的48节点MIMD并行DSP。该系统包括图像处理算法、图形SFG工具、模拟器、路由工具、编译器、硬件配置和调试工具、应用程序开发库以及用于硬件验证的软件实现。系统板通过定制的Sbus控制器连接到SPARCstation,在8个VLSI芯片中包含384个处理器。软件环境支持正在开发的多处理器系统(VGI-1)。软件工具和库是模块化的,实现依赖关系在分层封装中隔离。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信