Energy-aware demand paging on NAND flash-based embedded storages

Chanik Park, Jeong-Uk Kang, Seon-Yeong Park, Jinsoo Kim
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引用次数: 90

Abstract

The ever-increasing requirement for high-performance and huge-capacity memories of emerging embedded applications has led to the widespread adoption of SDRAM and NAND flash memory as main and secondary memories, respectively. In particular, the use of energy consuming memory, SDRAM, has become burdensome in battery-powered embedded systems. Intuitively, though demand paging can be used to mitigate the increasing requirement of main memory size, its applicability should be deliberately elaborated since NAND flash memory has asymmetric operation characteristics in terms of performance and energy consumption. In this paper, we present an energy-aware demand paging technique to lower the energy consumption of embedded systems considering the characteristics of interactive embedded applications with large memory footprints. We also propose a flash memory-aware page replacement policy that can reduce the number of write and erase operations in NAND flash memory. With real-life workloads, we show the system-wide energy-delay product can be reduced by 15/spl sim/30% compared to the traditional shadowing architecture.
基于NAND闪存的嵌入式存储的能源感知需求分页
新兴嵌入式应用对高性能和大容量存储器的需求不断增长,导致SDRAM和NAND闪存分别被广泛采用为主存储器和辅助存储器。特别是,在电池供电的嵌入式系统中,使用耗能存储器SDRAM已经成为负担。直观地说,虽然需求分页可以用来缓解对主存大小不断增加的需求,但由于NAND闪存在性能和能耗方面具有不对称的操作特性,因此应该刻意阐述其适用性。在本文中,我们提出了一种能量感知的需求分页技术,以降低嵌入式系统的能量消耗,并考虑到具有大内存占用的交互式嵌入式应用的特点。我们还提出了一种闪存感知的页面替换策略,可以减少NAND闪存中的写和擦除操作的数量。通过实际工作负载,我们展示了与传统阴影架构相比,系统范围的能量延迟产品可以减少15/spl sim/30%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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