{"title":"VLSI-oriented asynchronous controller synthesis based on a flip-flop cell array structure","authors":"K. Cho, M. Ikeda, K. Asada","doi":"10.1109/EUASIC.1991.212882","DOIUrl":null,"url":null,"abstract":"Presents a new implementation method of asynchronous controllers based on a cell array structure. Two kinds of cells are used to map asynchronous circuits synthesized by one-hot code assignment into layout; a basic cell with a flip-flop memory and set-reset logic, and an extension cell with set-reset logic. The present method gives considerable area reduction compared with a PLA-like implementation.<<ETX>>","PeriodicalId":118990,"journal":{"name":"Euro ASIC '91","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Euro ASIC '91","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUASIC.1991.212882","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Presents a new implementation method of asynchronous controllers based on a cell array structure. Two kinds of cells are used to map asynchronous circuits synthesized by one-hot code assignment into layout; a basic cell with a flip-flop memory and set-reset logic, and an extension cell with set-reset logic. The present method gives considerable area reduction compared with a PLA-like implementation.<>