{"title":"A capacitance boosted full-octave LC VCO based 0.7 to 24 GHz fractional-N synthesizer","authors":"B. Sadhu, M. Ferriss, D. Friedman","doi":"10.1109/RFIC.2015.7337717","DOIUrl":null,"url":null,"abstract":"This paper describes a technique in which a series inductance is used with a varactor to increase the varactor maximum to minimum capacitance ratio, thus enabling increased tuning range in an LC VCO. This technique is demonstrated through the implementation of an LC VCO tunable over a range greater than an octave, specifically 10.5 to 24 GHz (78%). The VCO is implemented within a fractional-N synthesizer in 32nm SOI CMOS to achieve continuous tuning from a fixed reference and achieves -128 to -119 dBc/Hz phase noise at 10MHz offset from the carrier across the tuning range. Output divider circuits are used to obtain all frequencies down to 660MHz.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15
Abstract
This paper describes a technique in which a series inductance is used with a varactor to increase the varactor maximum to minimum capacitance ratio, thus enabling increased tuning range in an LC VCO. This technique is demonstrated through the implementation of an LC VCO tunable over a range greater than an octave, specifically 10.5 to 24 GHz (78%). The VCO is implemented within a fractional-N synthesizer in 32nm SOI CMOS to achieve continuous tuning from a fixed reference and achieves -128 to -119 dBc/Hz phase noise at 10MHz offset from the carrier across the tuning range. Output divider circuits are used to obtain all frequencies down to 660MHz.
本文描述了一种将串联电感与变容管一起使用以增加变容管最大与最小电容比的技术,从而增加了LC压控振荡器的调谐范围。该技术通过在大于一个倍频程的范围内(特别是10.5至24 GHz(78%))可调谐的LC压控振荡器的实现来演示。该VCO在32nm SOI CMOS的分数n合成器中实现,可从固定基准实现连续调谐,并在调谐范围内从载波偏移10MHz处实现-128至-119 dBc/Hz的相位噪声。输出分频电路用于获得660MHz以下的所有频率。