A capacitance boosted full-octave LC VCO based 0.7 to 24 GHz fractional-N synthesizer

B. Sadhu, M. Ferriss, D. Friedman
{"title":"A capacitance boosted full-octave LC VCO based 0.7 to 24 GHz fractional-N synthesizer","authors":"B. Sadhu, M. Ferriss, D. Friedman","doi":"10.1109/RFIC.2015.7337717","DOIUrl":null,"url":null,"abstract":"This paper describes a technique in which a series inductance is used with a varactor to increase the varactor maximum to minimum capacitance ratio, thus enabling increased tuning range in an LC VCO. This technique is demonstrated through the implementation of an LC VCO tunable over a range greater than an octave, specifically 10.5 to 24 GHz (78%). The VCO is implemented within a fractional-N synthesizer in 32nm SOI CMOS to achieve continuous tuning from a fixed reference and achieves -128 to -119 dBc/Hz phase noise at 10MHz offset from the carrier across the tuning range. Output divider circuits are used to obtain all frequencies down to 660MHz.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337717","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15

Abstract

This paper describes a technique in which a series inductance is used with a varactor to increase the varactor maximum to minimum capacitance ratio, thus enabling increased tuning range in an LC VCO. This technique is demonstrated through the implementation of an LC VCO tunable over a range greater than an octave, specifically 10.5 to 24 GHz (78%). The VCO is implemented within a fractional-N synthesizer in 32nm SOI CMOS to achieve continuous tuning from a fixed reference and achieves -128 to -119 dBc/Hz phase noise at 10MHz offset from the carrier across the tuning range. Output divider circuits are used to obtain all frequencies down to 660MHz.
一种基于0.7至24 GHz分数n合成器的电容增强全倍频程LC压控振荡器
本文描述了一种将串联电感与变容管一起使用以增加变容管最大与最小电容比的技术,从而增加了LC压控振荡器的调谐范围。该技术通过在大于一个倍频程的范围内(特别是10.5至24 GHz(78%))可调谐的LC压控振荡器的实现来演示。该VCO在32nm SOI CMOS的分数n合成器中实现,可从固定基准实现连续调谐,并在调谐范围内从载波偏移10MHz处实现-128至-119 dBc/Hz的相位噪声。输出分频电路用于获得660MHz以下的所有频率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信