A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver

Abstract

The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.