{"title":"Modeling and design of an improved current-fed converter with new voltage multiplier circuit combination","authors":"Y. Liao, Ching-Ming Lai, Y. Ke","doi":"10.1109/IAS.2011.6074399","DOIUrl":null,"url":null,"abstract":"The objective of this paper is focused on developing an improved current-fed converter with new voltage multiplier circuit for low-voltage distributed energy systems. The proposed four-phase current-fed converter is with interleaved configuration and preserving the inherent advantage with smaller input current ripple. Through the proposed topology, the high voltage gain can be achieved using the relatively lower transformer turns ratio. Also, the voltage stresses of both active switches and diodes are greatly reduced so that the low on-resistance switches can be adopted and the reverse-recovery effect of diodes can be decreased naturally. The DC and AC small signal models of the proposed converter are derived for better closed loop control, and some design guidelines are then given for circuit implementation. Both simulation and experimental results indeed verify the effectiveness of the proposed converter.","PeriodicalId":268988,"journal":{"name":"2011 IEEE Industry Applications Society Annual Meeting","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-11-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE Industry Applications Society Annual Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IAS.2011.6074399","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
The objective of this paper is focused on developing an improved current-fed converter with new voltage multiplier circuit for low-voltage distributed energy systems. The proposed four-phase current-fed converter is with interleaved configuration and preserving the inherent advantage with smaller input current ripple. Through the proposed topology, the high voltage gain can be achieved using the relatively lower transformer turns ratio. Also, the voltage stresses of both active switches and diodes are greatly reduced so that the low on-resistance switches can be adopted and the reverse-recovery effect of diodes can be decreased naturally. The DC and AC small signal models of the proposed converter are derived for better closed loop control, and some design guidelines are then given for circuit implementation. Both simulation and experimental results indeed verify the effectiveness of the proposed converter.