New multilevel converter topology with minimum number of gate driver circuits

Abstract

In this paper, a new topology of cascaded multilevel converter using a reduced number of insulated gate driver circuits and voltage standing on switches is proposed. The proposed topology results in reduction of installation area and cost and has simplicity of control system. This structure consists of series connected sub-multilevel converters blocks. Three algorithms for determination of dc voltage source magnitudes have been presented, too. The validity of the analysis results has been proved by experimental results.