Cost considerations for integrating flip chip and chip on board technologies into high volume manufacturing areas

Abstract

As die mount assembly begins to enter the high volume surface mount assembly mainstream and electronics designers and engineers begin serious discussions about converting surface mount designs to die mount assembly designs for the purposes of miniaturization or improved electrical performance, it is desirable to have a cost model which can be used to understand the cost implications. The cost for die mount assembly is impacted in three major categories: materials, assembly, and repair. In this paper, a cost model, addressing the assembly portion of the cost, is developed and partially verified. The cost model is based on a current surface mount assembly cost model and is intended to be used as a guideline for comparing the assembly cost of surface mount assemblies to the assembly cost for die mount assemblies.