{"title":"Advanced ATM switching system hardware technology using MCM-D, stacking RAM microprocessor module","authors":"N. Yamanaka, T. Kawamura, K. Kaizu, A. Harada","doi":"10.1109/ECTC.1998.678812","DOIUrl":null,"url":null,"abstract":"This paper describes newly developed advanced ATM switching system hardware structures based on MCM-D microprocessor modules. The Si-substrate MCM-D technology which integrates microprocessor, interface control and peripheral control custom VLSIs, high-speed SRAMs, and FPGAs is employed. An MCM-D microprocessor module is realized by combining a Motorola 68030, high-performance ASICs, and high-speed SRAM caches. This is made possible by high density packaging and high-speed 4M-byte with parity cache using 25 ns access to 4-Mbit of SRAM memory. The MCM employs 12 SRAMs, possible with the stacked RAM technique, to reduce the module size by 7/8 compared to conventional surface mounting modules. This microprocessor module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.","PeriodicalId":422475,"journal":{"name":"1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 Proceedings. 48th Electronic Components and Technology Conference (Cat. No.98CH36206)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1998.678812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper describes newly developed advanced ATM switching system hardware structures based on MCM-D microprocessor modules. The Si-substrate MCM-D technology which integrates microprocessor, interface control and peripheral control custom VLSIs, high-speed SRAMs, and FPGAs is employed. An MCM-D microprocessor module is realized by combining a Motorola 68030, high-performance ASICs, and high-speed SRAM caches. This is made possible by high density packaging and high-speed 4M-byte with parity cache using 25 ns access to 4-Mbit of SRAM memory. The MCM employs 12 SRAMs, possible with the stacked RAM technique, to reduce the module size by 7/8 compared to conventional surface mounting modules. This microprocessor module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.