Deterministic network on chip for deploying real time applications on many-core processors

Abstract

The adoption of multi- and many-core processors in avionic applications is still limited by certification concerns, mainly due to non-deterministic behavior. In this paper, we review requirements of avionic applications, and we identify some of the critical issues that they are going to face on many-core processors. We then propose a preliminary version of a network-on-chip architecture suitable for airworthiness certification, which combines quality-of-service and fault-tolerance.