FPGA based embedded homogenous and hetrogenous multi-processor SoC design: A review

Omar F. Yousif, M. H. Salih, R. Ahmed, L. A. Hasnawi, R. Al-Janabi
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引用次数: 1

Abstract

The huge and fast development in all our life aspects motivated the system designers to increase system performance and in the same time decreasing the cost and power consumption. FPGAs based embedded systems can provide the equilibrium between many critical concepts like, performance, rapid time to market, and flexibility, so they have become the preferred source of computation in many critical embedded systems. The wide variety of needed tasks and new life facilities pushed towards highly reactive and multi-functional systems. This was the main reason that assists replacing the simple processing units with heterogeneous multi-processor units. The main advantage of using heterogeneous multi-processing units in field programmable gate array is to perform specific functions in almost real-time respond and the ability to reconfigure these units and decreasing the time required for re-mapping the application into the new architecture when the architecture changes. In the same time heterogeneity has its own problems also, like synchronization, communication between different computational units and also resources management. This paper will review a proposed heterogeneous multi-processor platform, the way to handle the synchronization between processors, the way in which these processors are communicate with each other or exchange information between them when needed and how a sequence of tasks can be scheduled to be processed.
基于FPGA的嵌入式同质和异构多处理器SoC设计综述
在我们生活的各个方面巨大而快速的发展促使系统设计者在提高系统性能的同时降低成本和功耗。基于fpga的嵌入式系统可以提供许多关键概念之间的平衡,如性能、快速上市时间和灵活性,因此它们已成为许多关键嵌入式系统的首选计算源。各种各样需要的任务和新的生活设施推动了高度反应和多功能的系统。这是用异构多处理器单元代替简单处理单元的主要原因。在现场可编程门阵列中使用异构多处理单元的主要优点是几乎可以实时响应执行特定功能,并且能够重新配置这些单元,减少了在体系结构更改时将应用程序重新映射到新体系结构所需的时间。同时,异构也有其自身的问题,如同步、不同计算单元之间的通信和资源管理。本文将回顾一种被提议的异构多处理器平台,处理处理器之间同步的方式,这些处理器在需要时相互通信或交换信息的方式,以及如何安排任务序列进行处理。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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