Omar F. Yousif, M. H. Salih, R. Ahmed, L. A. Hasnawi, R. Al-Janabi
{"title":"FPGA based embedded homogenous and hetrogenous multi-processor SoC design: A review","authors":"Omar F. Yousif, M. H. Salih, R. Ahmed, L. A. Hasnawi, R. Al-Janabi","doi":"10.1109/ICOS.2014.7042637","DOIUrl":null,"url":null,"abstract":"The huge and fast development in all our life aspects motivated the system designers to increase system performance and in the same time decreasing the cost and power consumption. FPGAs based embedded systems can provide the equilibrium between many critical concepts like, performance, rapid time to market, and flexibility, so they have become the preferred source of computation in many critical embedded systems. The wide variety of needed tasks and new life facilities pushed towards highly reactive and multi-functional systems. This was the main reason that assists replacing the simple processing units with heterogeneous multi-processor units. The main advantage of using heterogeneous multi-processing units in field programmable gate array is to perform specific functions in almost real-time respond and the ability to reconfigure these units and decreasing the time required for re-mapping the application into the new architecture when the architecture changes. In the same time heterogeneity has its own problems also, like synchronization, communication between different computational units and also resources management. This paper will review a proposed heterogeneous multi-processor platform, the way to handle the synchronization between processors, the way in which these processors are communicate with each other or exchange information between them when needed and how a sequence of tasks can be scheduled to be processed.","PeriodicalId":146332,"journal":{"name":"2014 IEEE Conference on Open Systems (ICOS)","volume":"30 11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Conference on Open Systems (ICOS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICOS.2014.7042637","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The huge and fast development in all our life aspects motivated the system designers to increase system performance and in the same time decreasing the cost and power consumption. FPGAs based embedded systems can provide the equilibrium between many critical concepts like, performance, rapid time to market, and flexibility, so they have become the preferred source of computation in many critical embedded systems. The wide variety of needed tasks and new life facilities pushed towards highly reactive and multi-functional systems. This was the main reason that assists replacing the simple processing units with heterogeneous multi-processor units. The main advantage of using heterogeneous multi-processing units in field programmable gate array is to perform specific functions in almost real-time respond and the ability to reconfigure these units and decreasing the time required for re-mapping the application into the new architecture when the architecture changes. In the same time heterogeneity has its own problems also, like synchronization, communication between different computational units and also resources management. This paper will review a proposed heterogeneous multi-processor platform, the way to handle the synchronization between processors, the way in which these processors are communicate with each other or exchange information between them when needed and how a sequence of tasks can be scheduled to be processed.