SoC features for a multi-processor WCDMA base-station modem

Abstract

WCDMA is a demanding 3rd generation wireless air interface technique. This paper discusses some system-on-chip architectural features associated with a fine-medium grain parallel DSP-based processor implementation of the base-band receiver section of a frequency division duplex WCDMA base-station. The software-oriented techniques are also relevant to other applications which require dense DSP.