An Approach to Velocity Estimation Using FPGA

Abstract

FPGAs are focused on recently as motion control processors. Sampling periods become shorter by using FPGAs, and it is expected that improvement of the performance of the motion control system. However in M method, which is the most generally used velocity estimation method, velocity resolution becomes low due to the short sampling period. This leads to a limitation of the performance, especially in acceleration control using a disturbance observer which requires accurate velocity information. There are several velocity estimation methods to improve the resolution. These methods require a dividing operation. From point of view of resource sharing and resource utilization of FPGAs, implementing divider is not desired. In this paper, velocity estimation which does not require any divider is proposed to improve the velocity resolution in the short sampling period system. The validity of the proposed method is demonstrated by simulation, and the proposed method is implemented into position control system based on the acceleration control in experiments.