{"title":"A novel tool to introduce FPGA in digital design laboratory","authors":"G. Donzellini, D. Ponta","doi":"10.1109/REV.2012.6293135","DOIUrl":null,"url":null,"abstract":"The new technological scenarios in digital systems demand the introduction of FPGA very early in digital design curricula. The approach that we present in the paper is based on a new tool that extends the features of Deeds, the design suite for digital circuits developed in our department. The FPGA extension allows students to compile a project generated with Deeds into an FPGA chip, reducing to a minimum the interaction with the FPGA-specific CAD. The tool is centered around a module that allows the student to associate all the input and output of the Deeds project to the devices and resources of an FPGA development board. A code generator will produce all the VHDL and script files needed by the CAD to compile the project and load it on the board for testing.","PeriodicalId":166546,"journal":{"name":"2012 9th International Conference on Remote Engineering and Virtual Instrumentation (REV)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-07-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 9th International Conference on Remote Engineering and Virtual Instrumentation (REV)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/REV.2012.6293135","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
The new technological scenarios in digital systems demand the introduction of FPGA very early in digital design curricula. The approach that we present in the paper is based on a new tool that extends the features of Deeds, the design suite for digital circuits developed in our department. The FPGA extension allows students to compile a project generated with Deeds into an FPGA chip, reducing to a minimum the interaction with the FPGA-specific CAD. The tool is centered around a module that allows the student to associate all the input and output of the Deeds project to the devices and resources of an FPGA development board. A code generator will produce all the VHDL and script files needed by the CAD to compile the project and load it on the board for testing.