SCALES - A behavioral simulator for pipelined analog-to-digital converter design

Abstract

The design of analog-to-digital converters (ADCs) requires a starting phase to specify system parameters which define the basic characteristics of the target converter. This initial phase is usually made using some kind of behavior modeling. The development of an ADC simulator requires the behavior modeling of the basic building blocks and their possible interconnections to form the final converter. This paper presents a Pipeline ADC simulator tool (SCALES) which allows topology selection and digital calibration of the frontend blocks. Several block non-linearity's are included in the simulation, such as thermal noise, capacitor mismatch, gain and offset errors, parasitic capacitances, settling errors and other error sources. SCALES was developed in Python to allow platform independence in today's computer systems.