A Novel Lightweight PUFs Using Interconnect Line Mismatch for Hardware Security

Ye Lin, Yuejun Zhang, Jia Chen, Jinliang Han
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引用次数: 2

Abstract

The emerging physical unclonable functions (PUFs) in the IC supply chain pose not only a challenge to security threats, but also a serious concern about hardware efficiency. Traditional PUF relies on the mismatch of the device, and it may occupy lager area of the chip. In this paper, the physical unclonable function based on interconnect line mismatch is proposed with lightweight property. Due to the inevitable random difference in the process of the interconnect, the delay of the two lines will be different, to produce the random data of the PUF circuits. Then, PUF array is designed with control circuit, PUF cell circuit, and output circuit. Under the TSMC 65 nm CMOS technology, the proposed PUF can provide the physical random entropy source. Using Cadence simulation EDA tools, the experiments are performed to evaluate the performance of PUF circuits. And it operates at 1.2 V, ensures randomness and uniqueness with 48.6% hamming distance. Compared with other state-of-the-arts, the hardware cost reduces more than 15%. The experiment results show that interconnect line PUF provides better lightweight and randomness.
一种利用互连线不匹配实现硬件安全的新型轻量级puf
IC供应链中出现的物理不可克隆功能(puf)不仅对安全威胁提出了挑战,而且对硬件效率也提出了严重的担忧。传统的PUF依赖于器件的不匹配,可能占用更大的芯片面积。本文提出了基于互连线不匹配的物理不可克隆函数,该函数具有轻量化的特点。由于互连过程中不可避免的随机差异,两条线路的延迟会不同,从而产生PUF电路的随机数据。然后,设计了PUF阵列,包括控制电路、PUF单元电路和输出电路。在台积电65nm CMOS工艺下,该PUF可提供物理随机熵源。利用Cadence仿真EDA工具,对PUF电路的性能进行了实验评估。工作电压为1.2 V,保证随机性和唯一性,汉明距离为48.6%。与其他先进设备相比,硬件成本降低15%以上。实验结果表明,互连线PUF具有较好的轻量化和随机性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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