Ghavam G. Shahidi, A. Ajmera, Fariborz Assaderaghi, R. Bolam, Andres Bryant, M. Coffey, H. Hovel, J. Lasky, E. Leobandung, H.-S. Lo, M. Maloney, D. Moy, Werner A. Rausch, D. Sadana, Dominic J. Schepis, M. Sherony, J. Sleight, Lawrence F. Wagner, K. Wu, Bijan Davari, T. Chen
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引用次数: 14
Abstract
Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20-35% performance gain over a bulk technology implemented with the same lithography. In this paper, the challenges of mainstreaming the SOI technology in device, material, technology and circuit terms are described.
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