Submicron BICMOS compatible high voltage MOS transistors

Abstract

The design and implementation of high-voltage MOS transistors fully compatible with 0.8 /spl mu/m BICMOS technology is considered in this paper. Two-dimensional simulations were used in the design of the structures. Three different structures are presented. The results indicate that it is possible to implement MOS devices with a pitch of 8 /spl mu/m, breakdown voltage of the order of 20 to 50 V and specific on-resistance of the order of 0.8 to 10 m/spl Omega/ cm/sup 2/ by minor layout modifications and without changes in the process itself.