S. Matsuda, T. Hiramatsu, R. Honda, D. Matsubayashi, H. Tomisu, Y. Kobayashi, K. Tochibayashi, R. Hodo, H. Fujiki, Y. Yamamoto, M. Tsubuku, Y. Okazaki, S. Yamazaki
{"title":"30-nm-channel-length c-axis aligned crystalline In-Ga-Zn-O transistors with low off-state leakage current and steep subthreshold characteristics","authors":"S. Matsuda, T. Hiramatsu, R. Honda, D. Matsubayashi, H. Tomisu, Y. Kobayashi, K. Tochibayashi, R. Hodo, H. Fujiki, Y. Yamamoto, M. Tsubuku, Y. Okazaki, S. Yamazaki","doi":"10.1109/VLSIT.2015.7223680","DOIUrl":null,"url":null,"abstract":"We report the world's smallest field effect transistors (FETs) with channel lengths of 32 nm including c-axis aligned crystalline (CAAC) In-Ga-Zn-O as their active layers, which achieve low off-state leakage currents. Furthermore, these FETs exhibit excellent subthreshold swing values despite having thick gate insulating film. The FET operation has been achieved owing to the 3D gate structure with a thin active layer, due to the FETs being accumulation-type FETs with intrinsic channels, and due to the dielectric anisotropy of the CAAC crystal structure.","PeriodicalId":181654,"journal":{"name":"2015 Symposium on VLSI Technology (VLSI Technology)","volume":"56 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-06-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 Symposium on VLSI Technology (VLSI Technology)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2015.7223680","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 18
Abstract
We report the world's smallest field effect transistors (FETs) with channel lengths of 32 nm including c-axis aligned crystalline (CAAC) In-Ga-Zn-O as their active layers, which achieve low off-state leakage currents. Furthermore, these FETs exhibit excellent subthreshold swing values despite having thick gate insulating film. The FET operation has been achieved owing to the 3D gate structure with a thin active layer, due to the FETs being accumulation-type FETs with intrinsic channels, and due to the dielectric anisotropy of the CAAC crystal structure.