Hot-carrier reliability of high side NDMOS in smart power SOI technologies

Abstract

The influence of the stacking potential on the hot-carrier (HC) reliability and safe operational area (SOA) of lateral SOI-NDMOS transistors is investigated for the first time. It is shown by measurements and simulation results that a decrease in the off-state breakdown voltage due to the potential of the wafer backside of NDMOS devices does not necessarily implicate a decrease of the HC reliability while the electrical SOA can be reduced.