Defect study of manufacturing feasible porous low k dielectrics direct polish for 45nm technology and beyond

Abstract

In this paper, the specific 45nm direct polish related defects and its effects were investigated in order to achieve the high yield manufacturing feasibility of direct polish to porous low-k dielectric film. Crater defect (ring shape metal bridge) was identified caused by abrasive residue in the pre-metal layer polish. Polished with colloidal silica based Cu slurry could suppress this defect efficiently. The plasma treatment on porous ultra low-k (ULK) layer improved the adhesion. However, it induced peeling when polish stop at this treated interface. It could be removed if further polish to intact ULK film. High Cu roughness possibly induced both pattern missing and via open in the following metal layer and suffered the yields. The V1M2 upstream electro-migration (EM) at this generation highly correlated to the roughness degree. By optimizing clean chemical concentration and clean time satisfied the needs of Cu roughness. Yield improvement proved the manufacturing feasibility of ULK direct polish technology.