A universal method for implementing IEEE 1588 with the 1000M Ethernet Interface

Zhaoqing Liu, Dongxing Zhao, Min Huang, Yigang Zhang
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引用次数: 4

Abstract

This paper proposed a universal method for implementing PTP (Precision Time Protocol) for test systems with the 1000M Ethernet Interface. To achieve the synchronization accuracy of sub-microsecond, the configurable real-time clock and the time stamp module were realized in the programmable logic which makes the PHY and MAC to be free of time stamp functions in the communication link. PTPd (Precision Time Protocol deamon, an open source implementation) was modified and transplanted into the embedded Linux system to realize PTP state machine while the IEEE 1588 IP core device driver was developed to provide the application layer with access to the accurate time-stamp obtained in link layer by IEEE 1588 IP core. This project structure makes the transplantation process concentrate on the time adjustment algorithm design in the application layer regardless of obtaining a precise time stamp in the hardware. The proposed method was evaluated on the Xilinx Zynq-7000 SOC platform by outputting PPS (Pulse Per Second) which can verify the synchronization accuracy of all nodes (master and slaves) in the network. After quantifying the accuracy and stability of the synchronization offset, we concluded that clock frequency offset and network transmission delay are the main influence factors for synchronization and proved the feasibility of maintaining submicrosecond-level synchronization accuracy within multi-level switch topology.
用1000M以太网接口实现IEEE 1588的通用方法
提出了一种用于1000M以太网接口测试系统实现PTP (Precision Time Protocol)的通用方法。为了达到亚微秒级的同步精度,在可编程逻辑中实现了可配置的实时时钟和时间戳模块,使PHY和MAC在通信链路中不受时间戳功能的限制。对开源实现PTPd (Precision Time Protocol deamon)进行修改并移植到嵌入式Linux系统中实现PTP状态机,同时开发IEEE 1588 IP核设备驱动程序,为应用层提供访问IEEE 1588 IP核在链路层获得的精确时间戳的权限。这种项目结构使得移植过程集中在应用层的时间调整算法设计上,而不需要在硬件上获取精确的时间戳。在Xilinx Zynq-7000 SOC平台上,通过输出PPS(脉冲每秒)来验证网络中所有节点(主节点和从节点)的同步精度,对该方法进行了评估。通过对同步偏移精度和稳定性进行量化,得出时钟频率偏移和网络传输延迟是同步的主要影响因素,并证明了在多级交换机拓扑结构中保持亚微秒级同步精度的可行性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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