A 112-Gb/s Single-Ended PAM-4 Transceiver Front-End for Reach Extension in Long-Reach Link

Xiongshi Luo, Xuewei You, J. Fu, Zhenghao Li, Liping Zhong, Taiyang Fan, Zhang Qiu, Wenbo Xiao, Yong Chen, Quan Pan
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引用次数: 1

Abstract

This paper presents a 112-Gb/s single-ended (SE) PAM-4 transceiver front-end for the reach-extension module in a 130 nm SiGe BiCMOS technology. The transmitter front-end is based on a differential-to-SE driver where the negative capacitance scheme is introduced to extend its bandwidth. The receiver front-end features a low-mismatch SE-to-differential (S2D) amplifier and an inductor-reuse continuous-time linear equalizer (CTLE). In the S2D, both the asymmetric reused inductor and capacitance compensation techniques are implemented to eliminate the mismatch at the pseudo-differential outputs. In the CTLE, both the inductor reuse and boosted current reuse techniques are adopted to save area, and further boost the maximum peaking frequency and equalization range. Our SE link demonstrates the highest 112-Gb/s PAM-4 data rate at a 20-dB channel loss with an energy efficiency of 1.81 pJ/bit.
一种用于长远链路延伸的112gb /s单端PAM-4收发器前端
本文提出了一种用于130 nm SiGe BiCMOS技术的延伸模块的112 gb /s单端(SE) PAM-4收发器前端。发射机前端基于差分- se驱动器,其中引入负电容方案以扩展其带宽。接收器前端具有低失配SE-to-differential (S2D)放大器和电感复用连续时间线性均衡器(CTLE)。在S2D中,实现了非对称复用电感和电容补偿技术,以消除伪差分输出处的不匹配。在CTLE中,采用电感复用和升压电流复用技术,既节省了面积,又进一步提高了最大峰值频率和均衡范围。我们的SE链路在20 db信道损耗下显示了最高的112 gb /s PAM-4数据速率,能量效率为1.81 pJ/bit。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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