{"title":"Polarity dependence of gate oxide quality with SOI substrates","authors":"H. Tseng, P. Tobin, S. Hong","doi":"10.1109/SOI.1995.526458","DOIUrl":null,"url":null,"abstract":"Gate oxides grown on SIMOX wafers contain defects originating from the substrate. The defect-induced traps may cause a threshold voltage instability problem for SOI MOSFET devices as well as gate oxide reliability degradation. Therefore it is essential to study the effect of traps on gate oxide quality with SOI substrates. In this paper, different trap behavior near different electrodes is presented. We find that there are high density positive-charged traps near the poly gate electrode. In addition to the rough poly/Si0/sub 2/ interface, the existence of a high density of positive traps close to the poly/SiO/sub 2/ interface could further degrade the gate oxide reliability for gate injection polarity with SOI wafers.","PeriodicalId":149490,"journal":{"name":"1995 IEEE International SOI Conference Proceedings","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1995-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1995 IEEE International SOI Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1995.526458","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Gate oxides grown on SIMOX wafers contain defects originating from the substrate. The defect-induced traps may cause a threshold voltage instability problem for SOI MOSFET devices as well as gate oxide reliability degradation. Therefore it is essential to study the effect of traps on gate oxide quality with SOI substrates. In this paper, different trap behavior near different electrodes is presented. We find that there are high density positive-charged traps near the poly gate electrode. In addition to the rough poly/Si0/sub 2/ interface, the existence of a high density of positive traps close to the poly/SiO/sub 2/ interface could further degrade the gate oxide reliability for gate injection polarity with SOI wafers.