Test Set Generation for Computer Simulation Design Debugging of Control Digital Systems with Finite Alphabet of Functions

Abstract

Design debugging is a very complex part of the control digital system in the design process. Revealing and correcting the mistakes is shortly described on the manufactured or prototyped system or on a simulated computer model. Computer simulation is referred to as the most appropriate way. The functioning of the great class of digital systems for equipment control can be described as fulfilling the sequence of functions from finite alphabet. The sequences of functions performed are presented as their products; it is shown that they form a partial semigroup. For the design debugging of digital systems by the simulation method, applied for verifying the correctness of the design, special debugging tests are used. They should most fully verify the correctness of the performance of all functions by the designed system. The methods of compiling and modifying the list of digital system functions by the developer in the way, which is the most convenient for verification, are presented. In addition, the breakdown of each digital system function into subfunctions is considered in order to verify the correct functioning of various hardware modes and program branches. The authors provide a formal description of the designer action sequence during digital systems debugging tests set developing.