A 20 ns 1 Mb CMOS burst mode EPROM

B. Ashmore, J. Schreck, P. Truong, T. Coffman, M. Andrews
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引用次数: 0

Abstract

A 64-K*16-b burst-mode EPROM (electrically programmable read-only memory) with a 20-ns statistical access time was achieved using 1.4- mu m lithography. An orthogonal x-drive and split array architecture allows efficient array segmentation utilizing a contactless buried diffusion memory cell. The resultant die size is 54.6 mm/sup 2/. The contactless, buried-diffusion memory cell is constructed using a self-aligned thick oxide (SATO) process which minimizes the array dimensions by requiring diffusion contacts only every 16 bits. The SATO array can be continuously biased without a power penalty because of its virtual ground array configuration. In many system applications, the burst mode memory configuration offers performance approaching maximum processor capability.<>
一个20 ns 1 Mb CMOS突发模式EPROM
采用1.4 μ m光刻技术,实现了具有20 ns统计访问时间的64-K*16-b突发模式EPROM(电可编程只读存储器)。正交x-驱动器和分裂阵列架构允许利用非接触式埋藏扩散存储单元进行有效的阵列分割。所得模具尺寸为54.6 mm/sup /。非接触式埋藏扩散存储单元采用自对齐厚氧化物(SATO)工艺构建,通过每16位只需要扩散触点来最小化阵列尺寸。佐藤阵列可以连续偏置而没有功率损失,因为它的虚拟地阵列配置。在许多系统应用中,突发模式存储器配置提供了接近最大处理器能力的性能。
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