C. Boye, DukKyun Moon, Steven McDermott, Norbert Arnold, N. Saulnier, F. Levitov, Sam-Kyu Choi, A. Goldenshtein, Uri Smolyan, N. Amit, I. Ok, I. Saraf
{"title":"Electrically Testable Product Macro Multi-via Measurement for Within Die CD Variation","authors":"C. Boye, DukKyun Moon, Steven McDermott, Norbert Arnold, N. Saulnier, F. Levitov, Sam-Kyu Choi, A. Goldenshtein, Uri Smolyan, N. Amit, I. Ok, I. Saraf","doi":"10.1109/asmc54647.2022.9792525","DOIUrl":null,"url":null,"abstract":"Critical Dimension (CD) measurement control strategies typically include measurements taken post plasma etch in a structure located in the kerf or street area specifically designed for this measurement. This type of measurement strategy is standard for control of CD variability across wafer. It is of interest to evaluate within macro CD variation of new designs at via levels by direct measurement of vias within the macro to characterize in-line sources of opens and resistance issues at electrical test. The steps taken and challenges encountered to develop a multi-via CD measurement in a testable macro and subsequent correlation to electrical test results will be described.","PeriodicalId":436890,"journal":{"name":"2022 33rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","volume":"242 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 33rd Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/asmc54647.2022.9792525","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Critical Dimension (CD) measurement control strategies typically include measurements taken post plasma etch in a structure located in the kerf or street area specifically designed for this measurement. This type of measurement strategy is standard for control of CD variability across wafer. It is of interest to evaluate within macro CD variation of new designs at via levels by direct measurement of vias within the macro to characterize in-line sources of opens and resistance issues at electrical test. The steps taken and challenges encountered to develop a multi-via CD measurement in a testable macro and subsequent correlation to electrical test results will be described.