ASIC cryptographical processor based on DES

I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. de Man
{"title":"ASIC cryptographical processor based on DES","authors":"I. Verbauwhede, F. Hoornaert, J. Vandewalle, H. de Man","doi":"10.1109/EUASIC.1991.212850","DOIUrl":null,"url":null,"abstract":"To date, many commercial applications in telecommunications, data transmission and data storage require a high level of cryptographical protection. The ASIC processor, presented here, can be programmed to execute a large set of cryptographical functions, not found in other cryptographical devices. Novel architectures for both data path and controller have been designed to realize this high degree of programmability, while still reaching a high throughput. The compact processor counts 18 K transistors on 25 mm/sup 2/ in a 2.4 mu m CMOS process and yet it reaches a throughput of 30 Mbit/s for every single-encryption mode. It is the fastest data encryption standard (DES) processor currently available.<<ETX>>","PeriodicalId":118990,"journal":{"name":"Euro ASIC '91","volume":"42 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-05-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Euro ASIC '91","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EUASIC.1991.212850","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

Abstract

To date, many commercial applications in telecommunications, data transmission and data storage require a high level of cryptographical protection. The ASIC processor, presented here, can be programmed to execute a large set of cryptographical functions, not found in other cryptographical devices. Novel architectures for both data path and controller have been designed to realize this high degree of programmability, while still reaching a high throughput. The compact processor counts 18 K transistors on 25 mm/sup 2/ in a 2.4 mu m CMOS process and yet it reaches a throughput of 30 Mbit/s for every single-encryption mode. It is the fastest data encryption standard (DES) processor currently available.<>
基于DES的ASIC加密处理器
迄今为止,电信、数据传输和数据存储方面的许多商业应用都需要高水平的加密保护。这里介绍的ASIC处理器可以被编程来执行大量的加密功能,这在其他加密设备中是找不到的。数据路径和控制器的新架构已经被设计来实现这种高度的可编程性,同时仍然达到高吞吐量。该紧凑型处理器在2.4 μ m CMOS工艺中以25mm /sup / /的速度计算了18k晶体管,但每种单一加密模式的吞吐量都达到了30mbit /s。它是目前最快的数据加密标准(DES)处理器。
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