{"title":"Design of Wideband Phase Modulator for 2.4~5.25 GHz Digital Polar Transmitter","authors":"Haoliang Zhu, Zhiqun Li, Zhennan Li, Yan Yao","doi":"10.1109/ASICON52560.2021.9620405","DOIUrl":null,"url":null,"abstract":"This paper presents a wideband phase modulator for 2.4~5.25GHz digital polar transmitter implemented in 22 nm CMOS process. The phase modulator is an open-loop phase modulation architecture for wide bandwidth, and modulates the output phase according to the principle of vector-sum. The core circuit of the phase modulator is a high-resolution I/Q phase interpolator (PI), which achieves phase modulation by the weighted summation of in-phase (I) and quadrature (Q) signals. Differential-current DACs are used to implement the I/Q weighting. The simulation results show that in the range of 2.4~5.25GHz, the power consumption is 11mW, the phase resolution is 0.7°, and the operating temperature covers -40~85℃.","PeriodicalId":233584,"journal":{"name":"2021 IEEE 14th International Conference on ASIC (ASICON)","volume":"64 1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE 14th International Conference on ASIC (ASICON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON52560.2021.9620405","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents a wideband phase modulator for 2.4~5.25GHz digital polar transmitter implemented in 22 nm CMOS process. The phase modulator is an open-loop phase modulation architecture for wide bandwidth, and modulates the output phase according to the principle of vector-sum. The core circuit of the phase modulator is a high-resolution I/Q phase interpolator (PI), which achieves phase modulation by the weighted summation of in-phase (I) and quadrature (Q) signals. Differential-current DACs are used to implement the I/Q weighting. The simulation results show that in the range of 2.4~5.25GHz, the power consumption is 11mW, the phase resolution is 0.7°, and the operating temperature covers -40~85℃.