Mousa Karimi, Mohamed Ali, Ahmad Hassan, M. Sawan, B. Gosselin
{"title":"A Wide-range Reconfigurable Deadtime and Delay Element for Optimal-Power Conversion","authors":"Mousa Karimi, Mohamed Ali, Ahmad Hassan, M. Sawan, B. Gosselin","doi":"10.1109/NEWCAS50681.2021.9462732","DOIUrl":null,"url":null,"abstract":"A reconfigurable dead-time circuit intended for optimum power-converters’ operation is presented. The circuit provides a programmable delay element to produce a wide range of dead-time delays for different power conversion’s applications with various loads and input voltages. The circuit utilises two tunable Schmitt triggers, two reconfigurable capacitive banks, and two adjustable-current sources. The post-layout simulation results show that the circuit can produce a wide range of dead-time delays, from 12.8 ns to 952.24 ns, between the control signals of the high and low sides of a power converter. The power consumption of the presented circuit ranges between 323.1 and 89.69 μW, pendant on the selected delay. The presented circuit is implemented in a 0.35-μm AMS CMOS technology where occupies an area of 150 μm×260 μm.","PeriodicalId":373745,"journal":{"name":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 19th IEEE International New Circuits and Systems Conference (NEWCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NEWCAS50681.2021.9462732","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A reconfigurable dead-time circuit intended for optimum power-converters’ operation is presented. The circuit provides a programmable delay element to produce a wide range of dead-time delays for different power conversion’s applications with various loads and input voltages. The circuit utilises two tunable Schmitt triggers, two reconfigurable capacitive banks, and two adjustable-current sources. The post-layout simulation results show that the circuit can produce a wide range of dead-time delays, from 12.8 ns to 952.24 ns, between the control signals of the high and low sides of a power converter. The power consumption of the presented circuit ranges between 323.1 and 89.69 μW, pendant on the selected delay. The presented circuit is implemented in a 0.35-μm AMS CMOS technology where occupies an area of 150 μm×260 μm.