On Series Connections of Fractional-Order Elements and Memristive Elements

Nariman A. Khalil, M. Fouda, L. Said, A. Radwan, A. Soliman
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引用次数: 1

Abstract

This paper proposes a current-controlled fractional-order memristor emulator based on one active building block. The emulator consists of a multiplication mode current conveyor (MMCC) block with three passive elements. Additionally, the series connection of fractional-order inductor (FOI) and fractional-order capacitor (FOC) with memristive elements in the i – v plane is demonstrated numerically for different cases. Changing the order of the FOC or FOI and its effect on the pinched hysteresis loop area are investigated, which improve the controllability of the double loop area, the location of the pinched point, and the operating frequency range. Numerical, PSPICE simulation results, and experimental verification are investigated for different cases to approve the theoretical findings. Moreover, a sensitivity analysis using Monte Carlo simulations for the tolerance of the discrete components of the memristor emulator is investigated.
分数阶元与忆元的级数连接
提出了一种基于一个有源构件的电流控制分数阶忆阻器仿真器。该仿真器由一个带有三个无源元件的乘法模式电流输送(MMCC)模块组成。此外,还对分数阶电感(FOI)和分数阶电容(FOC)在i - v平面上具有忆阻元件的串联连接进行了数值模拟。研究了改变FOC或FOI的顺序及其对缩紧迟滞环面积的影响,提高了双环面积的可控性、缩紧点的位置和工作频率范围。对不同情况下的数值、PSPICE模拟结果和实验验证进行了验证。此外,利用蒙特卡罗模拟对忆阻器仿真器离散元件的容差进行了灵敏度分析。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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