A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner

R. Póvoa, N. Lourenço, N. Horta, Rui Santos-Tavares, J. Goes
{"title":"A cascode-free single-stage amplifier using a fully-differential folded voltage-combiner","authors":"R. Póvoa, N. Lourenço, N. Horta, Rui Santos-Tavares, J. Goes","doi":"10.1109/ICECS.2014.7049972","DOIUrl":null,"url":null,"abstract":"This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHz×pF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.","PeriodicalId":133747,"journal":{"name":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2014.7049972","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 11

Abstract

This paper presents the design and the electrical simulations of a single-stage amplifier with high energy-efficiency and enhanced DC gain without the need of using any cascode devices or any positive-feedback or feed-forward techniques. Instead, a fully-differential folded voltage-combiner block is used in replacement of the traditional tail current-source that is normally employed to bias the differential-pair. Simulation results of the properly optimized circuit, using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool, demonstrate that a DC gain above 50 dB can be achieved, together with high energy efficiency. A simulated figure-of-merit above 2200 MHz×pF/mA has been reached. The circuit was designed using a 130 nm CMOS technology, draining approximately 0.2 mA from a 1.2 V power supply.
采用全差分折叠电压合成器的无级码单级放大器
本文介绍了一种高能效和增强直流增益的单级放大器的设计和电学仿真,而不需要使用任何级联器件或任何正反馈或前馈技术。相反,一个全差分折叠电压组合块被用来取代传统的尾电流源,通常用于偏置差分对。利用AIDA-C多目标多约束电路级优化工具对优化后的电路进行仿真,结果表明,该电路可以实现50 dB以上的直流增益,同时具有较高的能效。已达到2200 MHz×pF/mA以上的模拟优值。该电路采用130纳米CMOS技术设计,从1.2 V电源消耗约0.2 mA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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