{"title":"A novel approach to tool monitoring for furnace tools with dynamic recipe management","authors":"Shiladitya Chakravorty, Chihyun Jung, Garrett Szafman, J. Rajachidambaram, Bradley Savoy, Satyajit Shinde","doi":"10.1109/ASMC.2018.8373205","DOIUrl":null,"url":null,"abstract":"In semiconductor manufacturing regular tool monitoring is essential for quality control. For the case of furnace tools tool monitoring is done by processing tool qualification wafers on tools followed with measurements on the wafers. Regular tool qualification methods result in either reduction in tool availability or increase in test wafer consumption. This study presents a new methodology of tool qualification using Dynamic Recipe Management which allows reduction in tool down time while keeping test wafer consumptions low.","PeriodicalId":349004,"journal":{"name":"2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 29th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASMC.2018.8373205","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
In semiconductor manufacturing regular tool monitoring is essential for quality control. For the case of furnace tools tool monitoring is done by processing tool qualification wafers on tools followed with measurements on the wafers. Regular tool qualification methods result in either reduction in tool availability or increase in test wafer consumption. This study presents a new methodology of tool qualification using Dynamic Recipe Management which allows reduction in tool down time while keeping test wafer consumptions low.